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Building domain-specific compilers quickly with MLIR compiler infrastructure | Chris Lattner
The LLVM Intermediate Representation
LLVM in 100 Seconds
18 June 1500 LLHD A Multi level Intermediate Representation for Hardware Description Languages
LLHD - A Multi level Intermediate Representation for Hardware Description Langu
Wrestling Python into LLVM Intermediate Representation by Anna Herlihy
Why every compiler uses an intermediate representation
MLIR Open Meeting 2022-08-11: MLIR-based IR for Accelerator Design with Decoupled Customizations
2023 EuroLLVM - Multiple-Entry, Multiple-Exit MLIR Regions
MLIR Open Meeting 2022-01-20: A data-centric dialect for MLIR
Inside TensorFlow: MLIR for TF developers
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Last Updated: August 12, 2026
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