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High performance network functions with VPP
Using FPGA-Based SmartNICs for Packet Processing at 400 Gbps+
6 Event Driven Packet Processing
DPDK : Achieving high network performance on a CPU
D2 Day 2 High Performance packet processing
Edge Matters: Networking-DPDK
[EuroSys'21] Parallelizing Packet Processing in Container Overlay Networks (Long)