Introduction to Accelerating Networked Applications With Flexible Packet Processing
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Lightweight Data Center Packet Processing with RMT TCP
Rte_flow Optimization in i40e Driver - Chenmin Sun, Intel
A RISC-V in-network accelerator for flexible high-performance low-power packet processing
Flexible and Extensible support for new protocol processing using Dynamic Device Personalization
OSDI '24 - High-throughput and Flexible Host Networking for Accelerated Computing
Optimal Neural Network Acceleration via a Packet-based Architecture by Expedera
Mellanox FPGA
P4 Programmable Packet Processing Demo – Custom Workloads in Action Part 1
Service Chaining With HW Acceleration in Virtualized Environments - Roni Bar Yanai, NVIDIA
NSDI '17 - APUNet: Revitalizing GPU as Packet Processing Accelerator
Open, Elastic Provisioning of Hardware Acceleration in NFV Environments
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Last Updated: August 16, 2026
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